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KEYNOTE SPEAKERS

 
Jaya Panwalkar, Chief Guest

A short synopsis on Jaya Panvalkar’s Profile – 40 years of professional career

Nvidia
1. Mrs. Jaya Panvalkar, is managing NVIDIA’S Pune Design Center for last 5+ years. NVIDIA is a US based 4B$ technology company, a World Leader in Visual and Parallel Computing
2. Jaya was instrumental in setting up the Pune Design Centre; right from acquisition of PACE Soft Silicon an Irish Multinational. She was the Director and Chief Technology Officer at PACE Soft Silicon.
3. The center has grown from 65 people to 600+ in last 5 years.
4. Under her leadership, the center delivers products and solutions to NVIDIA customers in AsianPAC, mainly in Taiwan and Korea.
5. One of the key areas of her contribution is: setting up of research labs at more than 25 institutes all over India on GPU based Supercomputing, which include IIT Bombay, Delhi, Madras, Kanpur, leading colleges like VIT, VIIT, MIT, IISERs, IIITs & University of Pune as well as research organizations like IUUCA, NCRA.
6. She is instrumental in building the ecosystem for Parallel Supercomputing Based on GPUs in India with Infosys, Wipro, HCL, CDAC, CRL as service partners.
7. Under her leadership, NVIDIA’s Pune Center received Government of Maharashtra “IT innovation award” - 2008 and MCCIA B.G. Deshmukh “Corporate Social Responsibility award”.
8. She works on Board of Studies (BOS) of University of Pune, NIIT University and Chitkara University which offers Ph.D, MTech, BTech degree in this area.

PACE
• Jaya was Director & Chief Technology Officer of PACE Soft Silicon, an Irish multinational for 5 years delivering solutions for “camera based mobile phones” for photos, recording of videos. She has worked closely with Intel, Texas Instruments, Microsoft, Samsung, Motorola, Palm, ASUS and many others & has travelled widely across the globe including US, Europe, Japan, Korea, Taiwan.

CWPRS
• Jaya worked for 23 years at Central Water and Power Research Station (CWPRS), in Pune at Khadakwasla as Joint Director for the last few years of tenure.
• Jaya was instrumental in co-ordinating US$ 2 Billion worth of United Nations projects at CWPRS, for Hydraulic Instrumentation, coastal research, mathematical model studies & many more
• She has visited renowned organizations across the world like CDC, HP, DEC, NRC Canada, MTS Japan, etc Educational Background:
• She has completed BE and ME (Electronics and Telecom) from COEP, Pune & M.S. ( Computer Engineering) from Colorado State University , USA as a United Nations fellow &
• Her Management Expertise has developed through the Senior Executive Management programs at Stanford, USA & ISB, Hyderabad
• She is recipient of multiple United Nations Scholarships for advancement in education and technology & has been a National Scholar throughout her education. She has also received several awards including PARAM parallel processing award for special achievement Publications:
• Multiple Patents and Publications are to her credit Personal
• Mother of two, a son and a daughter, both successful in their respective careers and personal life




Leszek T. Lilien
Department of Computer Science
Western Michigan University
1903 West Michigan Avenue
Kalamazoo, MI

Ph.D. in Computer Science, University of Pittsburgh. Research at Western Michigan University (WMU), Purdue University, and University of Illinois at Chicago (UIC). Teaching at WMU and UIC. Tutorial instructor for IEEE Computer Society. Diversified R&D experience at AT&T/Lucent Bell Labs. Consultant for academic and business projects. Entrepreneurial experience in the United States and Poland.
Current research focused in two Areas: (1) opportunistic capability utilization networks or oppnets (a specialized kind of ad hoc networks); and (2) trust, privacy and security in open computing systems. In Area 1, focus on primitives for oppnets, privacy and security in oppnets, and interoperability of oppnet helper networks and devices. In Area 2, concentration on privacy-preserving data dissemination, authentication and privacy in health care, vulnerability analysis and threat assessment, the role of trust in open computing environments, analysis of computer security paradigms, modeling computer fraud, and security and privacy aspects in pervasive systems, including ad hoc sensor networks and embedded networks.
Former areas of investigation include: (a) distributed computing systems with concentration on decentralized control; (b) distributed database systems with focus on reliability, fault tolerance, recovery, concurrency control, query optimization, and database design; and (c) semantic database integrity.
Published over 55 peer-reviewed journal and conference papers, and six book chapters (at least four peer-reviewed). Editorial Board member for five journals. Organizer and Chair of the International Workshops on Specialized Ad Hoc Networks and Systems (SAHNS 2009 and SAHNS 2007) in conjunction with IEEE International Conference on Distributed Computing Systems (ICDCS 2009 and ICDCS 2007). Co-PI for a Navy grant on oppnets, and an NSF grant on vulnerability analysis and threat assessment/avoidance.
Senior Member of the Institute of Electrical and Electronics Engineers (IEEE) and IEEE Computer Society. Affiliated with the Center for Education and Research in Information Assurance and Security (CERIAS) at Purdue University.


Bharat Bhargava
Professor of Computer Science
Professor of Electrical and Computer Engineering
Purdue University

Bharat Bhargava is a professor of the Department of Computer Science with a courtesy appointment in the School of Electrical & Computer Engineering at Purdue University. Professor Bhargava is conducting research in security and privacy issues in distributed systems. This involves host authentication and key management, secure routing and dealing with malicious hosts, adaptability to attacks, and experimental studies. Related research is in formalizing evidence, trust, and fraud. Applications in e-commerce and transportation security are being tested in a prototype system. Based on his research in reliability, he is studying vulnerabilities in systems to assess threats to large organizations. He has developed techniques to avoid threats that can lead to operational failures. The research has direct impact on nuclear waste transport, bio-security, disaster management, and homeland security. These ideas and scientific principles are being applied to the building of peer-to- peer systems, cellular assisted mobile ad hoc networks, and to the monitoring of QoS-enabled network domains.


In the 1988 IEEE Data Engineering Conference, he and John Riedl received the best paper award for their work on "A Model for Adaptable Systems for Transaction Processing." Professor Bhargava is a Fellow of the Institute of Electrical and Electronics Engineers and of the Institute of Electronics and Telecommunication Engineers. In 1999, he received the IEEE Technical Achievement Award for a major impact of his decade long contributions to foundations of adaptability in communication and distributed systems. He has been awarded the charter Gold Core Member distinction by the IEEE Computer Society for his distinguished service. He received Outstanding Instructor Awards from the Purdue chapter of the ACM in 1996 and 1998. He has graduated the largest number of Ph.D students in CS department and is active in supporting/mentoring minority students. In 2003, he was inducted in the Purdue's Book of Great Teachers.


He serves on seven editorial boards of international journals. He also serves the IEEE Computer Society on Technical Achievement award and Fellow committees. Professor Bhargava is the founder of the IEEE Symposium on Reliable and Distributed Systems, IEEE conference on Digital Library, and the ACM Conference on Information and Knowledge Management.


Dr. Bhanu Kapoor
Ph.D. in Computer Science
University of Pittsburgh, USA


Dr. Bhanu Kapoor is the founder, president, and owner at Mimasic, a consulting company with focus on low power architecture design and verification. He has played leading technology development roles in semiconductor startups ArchPro (now Synopsys), Atrenta, and Verisity (now Cadence). He is an expert in the area of low power design and verification. He has authored 6 published USPTO patents in the area of low power design and verification and has over 50 publications in various IEEE/ACM conferences and journals. He started his career with Texas Instruments where he played various technical roles (1987-99) at TI’s R&D labs. Bhanu graduated from the Indian Institute of Technology (IITK) in 1987 with a degree in Electrical Engineering. He has received M.S. (1990) and Ph.D. (1994) degrees in Computer Science from SMU, Dallas. He is a senior member of the ACM and the IEEE.